Diagnostic of resistive faults in VLSI circuits applying neural networks

Abstract

Chips are getting smaller due to the reduction in transistor size. The reduction in the size of transistors means smaller technologies are used, which in turn results in smaller dies in size. This means an increase in the amount of dies able to fit on a silicon wafer. Very largescale integration (VLSI) is a process where an integrated circuit is created by hundreds of thousands of transistors on a single chip [1]. The number of transistors allowed on these chips has increased highly due to years of advancement in the manufacturing process of transistors. While all new chips are tested [2] and the design for one of these chips is adequate to fulfill the function it has, some chips will have an error in one of the many connections these chips have. Some of these errors will stem from structural failures due to issues in the integrated circuits manufacturing process, materials, or chemical composition [1] [3]. It may mean that a redesign in the fabrication process must be considered in order to reduce the number of defects. This could indicate a small change in doping, the use of a different mask in the lithography phase or having to change a different step in the methodology when fabricating the chip [4]. Chips are tested after manufacturing in batches and knowledge about faults is common among individuals conducting tests to find defective chips. These testers will normally depend on machines dedicated to testing chips for certain faults, but updating or repairing these machines may get costly over the years. As technology becomes smaller and faster, the number of transistors increases. It is far easier for conventional testing methods to fail as the structure of the circuit becomes more complex and traditional testing methods are left outdated. Some testing methods can be adapted and enhanced, but those methods become more costly monetarily over time when having to upgrade machinery [5] [1]. The cost of maintenance for such machinery is also worth acknowledging, not to mention the time taken to learn using a new machine is testing time lost and impacts the manufacturing process. This project is about an option for finding resistive-open defects with the application of artificial neural networks. This first chapter will go over the the justification of this project and the main concepts to better understand the resistive-open fault. A hypothesis will be presented afterwards along with the objective and goals of the project. Finally, the chapter will end with an explanation of the organization of the chapters for this thesis.